Esperanto Technologies to Reveal Chip with 1000+ Cores at RISC-V Summit

Art Swift, CEO of Esperanto Technologies, will present chip that accelerates Machine Learning based on RISC-V ISA

MOUNTAIN VIEW, Calif., Dec. 1, 2020Esperanto Technologies™, developer of high-performance, energy-efficient computing solutions based on RISC-V for Artificial Intelligence (AI), Machine Learning (ML) and Deep Learning (DL) applications, will participate in the RISC-V Summit, December 8-10, 2020. Art Swift, CEO of Esperanto, will deliver the presentation: Esperanto Accelerates Machine Learning with 1000+ Low-Power RISC-V Cores on a Single Chip on Tuesday, December 8.

Presentation: Esperanto Accelerates Machine Learning With 1000+ Low-Power RISC-V Cores on a Single Chip

  • Esperanto Technologies has developed a ground-breaking accelerator chip for large-scale machine learning applications employing over 1000 RISC-V cores.
  • In this talk, Esperanto provides an overview of the company’s new ET-SoC-1 chip, which features two kinds of general-purpose 64-bit RISC-V cores. The ET-Maxion, previewed at the RISC-V Summit in 2018, is a superscalar out-of-order core delivering high performance for modern operating systems and applications. The complementary ET-Minion core designed by Esperanto is a leaner, energy efficient, in-order multithreaded core with a vector/tensor accelerator unit at the heart of the massively parallel compute array.
  • The chip’s performance and efficiency is derived from a combination of factors, including the simplicity of the RISC-V instruction set, wide vector/tensor units on every ET-Minion core, a uniquely optimized memory hierarchy, state of the art process technology, and custom pipeline architecture and low-voltage circuits which enables more energy-efficient operation. The result is that Esperanto will deliver better performance per watt than legacy CPU and GPU solutions, as well as competing fixed-function designs without compromising generally purpose flexibility.

About Esperanto Technologies

Esperanto Technologies develops high-performance, energy-efficient computing solutions for Artificial Intelligence / Machine Learning based on the open standard RISC-V instruction set architecture. Esperanto is headquartered in Mountain View, California with engineering sites in Portland, Oregon and Austin, Texas in the United States and multiple sites in Europe. Esperanto has brought together a seasoned team of experienced processor and software engineers with the goal of making RISC-V the architecture of choice for compute-intensive applications such as AI and Machine Learning. For more information, please visit https://www.esperanto.ai/

About the RISC-V Summit

The third annual RISC-V Summit will highlight the continued rapid expansion of the RISC-V ecosystem, presenting both commercial offerings and exciting open-source developments. Newcomers to RISC-V, as well as the seasoned developers who are interested in broadening their toolsets, are invited to choose from the broad range of tutorials. The comprehensive 100% virtual event will feature keynotes from industry pioneers as well as thought-provoking panel discussions. Network with thought-leaders, technology companies, and researchers spearheading the adoption of this evolutionary change in the silicon market.

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