For hardware and system designers who need the most energy-efficient, high-performance computing solutions for Artificial Intelligence and Machine Learning applications, Esperanto Technologies delivers solutions based on the open RISC-V instruction set architecture (ISA).


Breaking Barriers

Esperanto is creating a new generation of Artificial Intelligence (AI) / Machine Learning (ML) / Deep Learning (DL) processing solutions delivering unmatched energy efficiency (performance/watt), scalability, and flexibility. The historical limitations on many-core designs have always been complexity and power consumption, but it is now possible to create designs with over a thousand processor cores on one piece of silicon.

Esperanto’s no-compromise solution breaks through previous barriers in delivering a massively parallel, flexible processor that combines high performance and ultra-low power consumption. Our high-performance ET-Maxion™ core is designed to deliver the best single-thread RISC-V performance. Our ET-Minion™ core compute array is designed for energy efficiency, delivering TeraFlops and TeraOps of computing.

Incorporating RISC-V, today’s most advanced and open instruction set architecture, and a comprehensive low-power design approach, Esperanto’s world class design team, with decades of high-performance processor architecture and low-power design expertise, is delivering a breakthough value proposition for AI / ML / DL applications and beyond.


Power consumption continues to be the most critical problem facing high-performance computing today.  Our approach employs an array of over a thousand of our low-power ET-Minion cores, delivering energy efficiency with high integer and floating-point throughput, including tensor and vector acceleration optimized for ML / DL workloads. Our distributed memory architecture puts on-chip memory where it’s needed, improving processing utilization and relieving memory bandwidth bottlenecks.

Optimized Performance graphicicon
Scalable Technology


The Esperanto architecture is both regular and hierarchical, scalable in a number of dimensions to address different applications, different levels of performance, different power profiles and system form factors. This flexibility delivers optimal energy efficiency for each target application, be it at the edge or within the data center, with a family of architecturally consistent products. With over a thousand high-performance, energy-efficient 64-bit RISC-V cores on one chip, Esperanto can deliver TeraFlops of scalable compute performance.



AI / ML / DL is experiencing an exciting pace of new model development, techniques and algorithms for existing and new use cases. Providing an easily programmable, flexible platform for innovative algorithm development and innovation is key to Esperanto’s mission. Our ET-Maxion core implements advanced features such as quad-issue out-of-order execution, branch prediction, and sophisticated prefetching algorithms to deliver high single-thread performance.

ET-Maxion cores are ideal for scheduling tasks across our array of ET-Minion cores, managing data movement and hosting operating systems such as Linux. In an accelerator configuration, this can increase host processing offload, freeing the host for other tasks and improving overall system-level performance.  Also, the open RISC-V architecture allows Esperanto users to leverage the fast-growing RISC-V software and tool ecosystem.


RISC-V Foundation

RISC-V (pronounced “risk-five”) is a free and open ISA enabling a new era of processor innovation through open standard collaboration. Founded in 2015, the RISC-V Foundation comprises more than 100 member organizations building the first open, collaborative community of software and hardware innovators powering innovation at the edge forward. Born in academia and research, the RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation. Visit

Latest Esperanto News