Esperanto Technologies at DAC 2018
Meet Mike Dierickx of Esperanto Technologies at DAC 2018
Advancing Custom/AMS Design & Verification for Storage, Automotive, and AI Applications: a Synopsys Lunch Panel.
Abstract: New-age applications such as storage, automotive, and AI are generating exacting demands on underlying semiconductor electronics such as Flash memory, GPUs, and application-specific processors. As a result, today’s IC designers increasingly have to contend with a dual set of challenges: FinFET design complexity, and stringent performance and reliability requirements demanded by these applications. At this event, designers will share their perspectives on some of these challenges and discuss how they leverage Synopsys’ Custom Design solutions to address these challenges to deliver robust AMS designs.
Mike Dierickx of Esperanto Technologies will introduce Esperanto, share his perspective on these challenges, and discuss how Esperanto leverages Synopsys’ Custom Design solutions.
Where: San Francisco Marriot Marriott Marquis, B2 Level, Golden Gate Ballroom
When: Monday 6/25 11:30am – 1:30pm
And follow Esperanto news!
DAC 2018 Keynote: Dave Patterson on Open RISC-V
Hear Dave Patterson’s keynote @55thDAC:
“A New Golden Age for Computer Architecture: Domain Specific Accelerators and Open RISC-V”
When: June 27, 9:20 AM.
Where: DAC 2018, Moscone Center, San Francisco, CA. Room 3008
For more information: click here.
And follow Esperanto news!
Securing High-performance RISC-V Processors from Time Speculation @ RISC-V Barcelona Workshop
BLOG
May 24th, 2018
Archives News
Christopher Celio and Jose Renau, CPU Architects from Esperanto Technologies, discussed potential changes to future high-performance RISC-V processors intended to eliminate speculation-based timing attacks, such as Spectre and Meltdown. They presented a proposal for RISC-V cores which minimizes changes to the RISC-V ISA or platform specifications in order to provide security against timing-based attacks.
Admission is free:
Admission is free to qualified registrants. The conference is intended for chip designers, system designers, equipment vendors, OEM/ODMs, service providers, press, and the financial community. Esperanto is a Gold sponsor of the Linley Fall Processor Conference.
Privileged ISA Tutorial @RISC-V Barcelona Workshop
Watch the “Privileged ISA” RISC-V Barcelona Workshop Tutorial Presentation.
Allen Baum, CPU Architect at Esperanto Technologies, presented a tutorial on the RISC-V privileged ISA, including a discussion on privileged architecture needs, features, modes and use case profiles.
And follow Esperanto news!
Vector ISA Proposal Update @RISC-V Barcelona Workshop
And follow Esperanto news!
Vector ISA Tutorial @RISC-V Barcelona Workshop 2018
“Vector ISA” RISC-V Barcelona Workshop Tutorial Presentation.
Roger Espasa, Chief Architect at Esperanto Technologies, delivered a tutorial on basic semantics and operation of the vector extension, including new states, configuration, instruction encoding and inter-operation, and more.
And follow Esperanto news!
