Esperanto Presents at the RISC-V Summit 2022

Hear Dave Ditzel of Esperanto Technologies speak at the RISC-V Summit 2022

Dave Ditzel, Founder and CTO of Esperanto Technologies, will deliver a presentation, “Real World Results using Thousands of RISC-V Cores for AI and Beyond,” at the RISC-V Summit on December 13, 2022.

The RISC-V community – including the technical, industry, domain and special interest groups who define the architecture’s specifications – attend the RISC-V Summit for four days of technology breakthroughs, industry milestones, tutorials, and relationship building. The event runs December 13–14, 2022 in San Jose, CA.

Presentation Title: Real World Results using Thousands of RISC-V Cores for AI and Beyond
Speaker: Dave Ditzel, CTO and Founder, Esperanto Technologies, Inc.
When: Tuesday December 13, 2022 4:45pm – 5:05pm PST
Where: Grand Ballroom A, San Jose McEnery Convention Center, 150 W San Carlos Street, San Jose, CA 95113
Abstract: Esperanto’s ET-SoC-1 features over a thousand 64-bit RISC-V vector/tensor cores on a single 7nm chip. This product started shipping to customers in 2022. This presentation will discuss the architecture of the ET-SoC-1 and how it is incorporated into systems appropriate for data centers. This presentation will present real world results in both performance and performance per watt. We will show a system example where a single rack could hold over 300,000 RISC-V processors. The results demonstrate that one can achieve excellent results for accelerating machine learning and other applications by building on top of the general-purpose RISC-V instruction set. One does not have to resort to GPUs to get good performance per watt, RISC-V is a better alternative. This talk will also discuss Esperanto’s roadmap, which will incorporate chiplet inter-operability and much higher performance, improved performance per watt, and larger number of cores per package.
Track: Industry, High-Performance Computing & Data Centers

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About RISC-V International
RISC-V International is the non-profit home of the open standard RISC-V Instruction Set Architecture (ISA), related specifications, and stakeholder community. More than 2,900 RISC-V members across 70 countries contribute and collaborate to define RISC-V open specifications as well as convene and govern related technical, industry, domain, and special interest groups. RISC-V combines a modular technical approach with an open, royalty-free license model — meaning that anyone, anywhere can benefit from the IP contributed and produced by RISC-V. RISC-V enables the community to share technical investment, contribute to the strategic future, create more rapidly, enjoy unprecedented design freedom, and substantially reduce the cost of innovation. To learn more, visit www.riscv.org.

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