A well-known entrepreneur and visionary in the computer and semiconductor industry, Dave was founder and CEO of Transmeta, maker of low power x86 microprocessors, raising over $600M from startup to a $6B IPO. Dave co-authored “The Case for RISC,” along with professor David Patterson. Previously, Dave was a vice president at Intel Corporation, leading advanced processor projects, and CTO at Sun Microsystems for the SPARC Technology Business. After earning a degree in Electrical Engineering and a separate degree in Computer Science, Dave did his graduate work at U.C. Berkeley under professor David Patterson.
A high-growth technology company CFO, Ralph has directed finance teams for US, European and Asian pre-IPO and publicly-traded companies spanning semiconductors; IoT; enterprise and applications software; IT and telecommunications; and more. His expertise in global financial operations, IPO and merger exits, strategic planning and equity financing helped raise $900M public and $510M venture capital equity, and he has lead five IPOs. Ralph attended Stanford University Law School Directors’ College, and holds an MBA in Finance from the University of Michigan and a BS EE/CS from Michigan State University.
David Glasco VP Engineering
An experienced technology manager, David was previously architecture and design lead for AutoPilot SoC hardware at Tesla. As senior director at AMD, he led next-generation x86 and ARM server SoC architecture and performance teams. At NVIDIA, spanning twelve years, David researched and lead the development of NVIDIA’s high-performance GPU memory system architecture. Earlier, he held engineering positions at Intel, IBM Research, HaL Computer Systems and MIT-Lincoln Labs. David received his PhD and Masters in Electrical Engineering from Stanford University. He holds 99 issued US patents to date.
Roger EspasaChief Architect
Roger is one of the world’s leading experts on vector architectures for high performance processors. He co-chairs the RISC-V Foundation vector extensions task group and is active on the RISC-V technical committee. Previously, at Broadcom, he worked on a new ARMV8 wide out-of-order core; and at Intel, developed vector extensions for both x86 ISA and Alpha architectures. Roger has published over 40 papers on vector architectures, graphics/3D architecture, and high-performance computing. He holds nine patents with 41 international filings. Roger earned his PhD in Computer Science from Universitat Politècnica de Catalunya.
Dan BaileyChief Engineer
A leading technologist, Dan joins Esperanto from Tesla, where he was circuit design lead for AutoPilot hardware. Prior to Tesla, he spent 12 years at AMD as senior fellow and technical fellow, the top echelon of technical roles. Dan also served as director for physical design at Calxeda, as a principal engineer at Intel, and in engineering roles at Compaq and on Digital Equipment’s Alpha CPU team. Previously, he was an assistant professor at the University of South Carolina. Dan received his PhD in Electrical Engineering at the University of Illinois at Urbana-Champaign, his BSEE from the University of Cincinnati, and has over 30 publications and 20 patents.
An experienced CTO and successful technology entrepreneur, Duane co-founded and was the VP Technology at DriveScale; as well as CTO / VP of several public technology companies, including the Connected Home Division of Technicolor, Trident Microsystems, and Silicon Image. Earlier, Duane was a Distinguished Engineer at Sun Microsystems, and on the Research Faculty in Carnegie Mellon’s School of Computer Science. He holds over 30 US patents, and authored / co-authored over a dozen technical research monographs, articles and reports. Duane received his MSEE and a PhD from Carnegie Mellon University.