Dave Ditzel’s presentation at the 7th RISC-V workshop has made a lot of waves in the press. Coverage highlights include:

EE Times

RISC-V Spins into Drives, AI
Western Digital, Esperanto tip plans for chips
Rick Merritt
11/28/2017 02:40 PM EST
SAN JOSE, Calif. — Storage giant Western Digital announced that it will standardize on RISC-V processors and has invested in Esperanto Technologies, a startup designing high-end SoCs and cores using the open-source instruction set architecture. The two moves suggest that RISC-V has emerged as a viable — but not yet mature — alternative to ARM and the x86.

Long-term, WD expects that it could ship as many as 2 billion RISC-V chips a year inside its hard-disk and solid-state drives. Privately, the company also revealed that it is working on machine-learning accelerators for inference, probably related to its unspecified investment in Esperanto.

Continue reading


Western Digital Gives A Billion Unit Boost To Open Source RISC-V CPU
Kevin Kreewell, contributor
12/6/2017 02:46 PM

Many (likely most) of you have not heard of RISC-V. It’s a new instruction set intellectual property (IP) that is open sourced and offers an alternative to licensed IP from Arm and MIPS. As instruction sets go, RISC-V is relatively new, having just exited the University of California, Berkeley and entered the market in 2014 and is now managed by the RISC-V Foundation. But in those last 3 years, the instruction set has gained momentum largely due to its simplicity of design and business model. Its timing could not have been better.

A Lack Of CPU IP Options
The industry leading company Arm was recently purchased by Softbank, a Japanese conglomerate. The most popular alternative to Arm instruction…[…]

Western Digital’s Corporate Investment in Esperanto
Western Digital has made public one of its financial investments in a RISC-V startup. The company is called Esperanto Technologies [www.Esperanto.ai]. Esperanto was in stealth mode for 2-3 years prior to this workshop. Following Mr. Fink’s keynote, Esperanto announced itis developing a very high performance system-on-a-chip using the RISC-V instruction set. The company was founded by Dave Ditzel, who previously had founded Transmeta back in the mid-1990s to build low-power x86 processors and had worked for Sun Microsystems and Intel, amongst other companies. Dave has put together an extensive team of industry veterans along with a few rising stars in the processor business. The team includes some of his old cohorts at Transmeta but includes veterans from companies…

Continue reading

Tom’s Hardware

Big Tech Players Start To Adopt The RISC-V Chip Architecture
Lucian Armasu
11/29/2017 02:40 PM

RISC-V (pronounced risc-five) is a brand-new instruction set architecture (ISA) that’s open to customize and free to use by anyone. The ISA is only a few years old, but both large and small companies, such as Nvidia, Western Digital, and Esperanto, are now planning to use RISC-V chips to power their products.

Why RISC-V Was Created
The initial version of the RISC-V ISA started development at the University of California, Berkeley, in 2010. The academics there wanted to develop a more modern and more efficient ISA for the 21st century that removes the legacy cruft and many mistakes built into multi-decade old instruction sets such as x86 and ARM. The researchers also wanted an ISA that is fully open and free for anyone to use for any purpose without having to pay any royalties to anyone.[…]

Esperanto Promises “AI At The Edge” With RISC-V Cores
Esperanto Technologies a chip designer from Mountain View, California, also announced at the latest workshop that it will start developing energy-efficient AI chips using the RISC-V ISA.”Esperanto’s goal is to make RISC-V the architecture of choice for the most demanding AI and machine learning applications which will drive computing innovation for the next decade,” said Esperanto CEO Dave Ditzel.“RISC-V is so simple and extensible that we can deliver world class TeraFlop levels of computing without needing to resort to proprietary instruction sets, thereby greatly increasing software availability,” he noted.

Continue reading