Blogs

Blogs2018-11-10T13:27:04+00:00

GLOW! with Facebook and Esperanto

September 25th, 2018|

Esperanto was featured in the Facebook Glow ecosystem presentation at the recent @Scale Conference in San Jose, and is happy to support and help to develop the Facebook Glow machine learning (#ML) compiler initiative! Jason Taylor, VP Infrastructure @Facebook, delivered a keynote describing their plan [...]

Join the RISC-V Summit in Silicon Valley

July 19th, 2018|

JOIN THE RISC-V REVOLUTION! Attend the RISC-V Summit and be part of the disruptive force transforming the microprocessor IP market through open standard collaboration. Learn more about RISC-V. December 3 - 5, 2018 [...]

DAC 2018 RISC-V Proceedings

July 13th, 2018|

RISC-V Foundation at DAC Proceedings here! See all the slide presentations from the RISC-V Foundation booth  @55thDAC, June 2018 in San Francisco. Click Here ...

RISC-V Video Interview @55thDAC

July 11th, 2018|

Watch the RISC-V video from DAC 2018 Rick O'Connor, RISC-V Executive Director, is interviewed by EDACafe @55thDAC in San Francisco. Watch it here ...

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DAC 2018 Keynote: Dave Patterson on Open RISC-V

June 18th, 2018|

Hear Dave Patterson’s keynote @55thDAC: “A New Golden Age for Computer Architecture: Domain Specific Accelerators and Open RISC-V” When: June 27, 9:20 AM. Where: DAC 2018, Moscone Center, San Francisco, CA.  Room 3008 For more [...]

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Esperanto Technologies at DAC 2018

June 18th, 2018|

Meet Mike Dierickx of Esperanto Technologies at DAC 2018 Advancing Custom/AMS Design & Verification for Storage, Automotive, and AI Applications: a Synopsys Lunch Panel. Abstract: New-age applications such as storage, automotive, and [...]

Vector ISA Tutorial @RISC-V Barcelona Workshop May 24, 2018

May 24th, 2018|

“Vector ISA” RISC-V Barcelona Workshop Tutorial Presentation. Roger Espasa, Chief Architect at Esperanto Technologies, delivered a tutorial on basic semantics and operation of the vector extension, including new states, configuration, instruction [...]

Privileged ISA Tutorial @RISC-V Barcelona Workshop

May 24th, 2018|

Watch the “Privileged ISA” RISC-V Barcelona Workshop Tutorial Presentation. Allen Baum, CPU Architect at Esperanto Technologies, presented a tutorial on the RISC-V privileged ISA, including a discussion on privileged architecture needs, features, [...]

NetSpeed and Esperanto Partner to Power SoCs for Artificial Intelligence

May 7th, 2018|

SAN JOSE, Calif., May 7, 2018 /PRNewswire/ -- NetSpeed Systems and Esperanto Technologies today announced that Esperanto has licensed NetSpeed's IP and intelligent design environment for its Supercomputer-on-a-Chip for Artificial Intelligence (AI) applications. Esperanto's 7nm [...]

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Esperanto Technologies Engineers to Present at RISC-V Workshop Barcelona

May 3rd, 2018|

MOUNTAIN VIEW, Calif., May 03, 2018 (GLOBE NEWSWIRE) -- Esperanto Technologies™, a developer of high-performance, energy-efficient computing solutions based on RISC-V for artificial intelligence and machine learning applications, will participate in the RISC-V Workshop Barcelona, [...]

Esperanto at the RISC-V Workshop, May 7-10, Barcelona

April 19th, 2018|

Date May 7 - May 10,  2018 Venue Universitat Politecnica De Catalunya. BarcelonaTech Barcelona Supercomputing Center. Centro Nacional de Supercomputación Barcelona, Spain Co-hosted By       Co-sponsored By   The RISC-V Foundation [...]

Art Swift presents at the Santa Cruz New Tech Meetup

March 7th, 2018|

At the Santa Cruz New Tech Meetup @SCNewTechMeetup, Art Swift of Esperanto Technologies presented on how @risc_v is driving the evolution of ISA (instruction set architecture) through open standard collaboration, and changing the tech [...]

7th RISC-V Workshop Proceedings Available

December 9th, 2017|

From the RISC-V Foundation. Proceedings and a recap of the 7th RISC-V Workshop held Nov 28-30th 2017 are now available. Read more. See the presentation by Dave Ditzel of Esperanto: Slides | Video [...]

Break out the Champagne!

November 27th, 2017|

After nearly three years in Stealth Mode, Esperanto Technologies president and CEO Dave Ditzel will make the first public disclosure of Esperanto’s planned development of high-performance, energy-efficient computing solutions based on the open [...]

Why RISC-V?

November 26th, 2017|

RISC-V is an open, free instruction set architecture (ISA) enabling a new era of processor innovation through open standard collaboration. Born in academia and research, the RISC-V ISA delivers a new level of [...]

6th RISC-V Workshop Proceedings Available

May 28th, 2017|

From the RISC-V Foundation. Proceedings of the 6th RISC-V Workshop held November 29-30, 2016 are now available.  Read more. Dave Patterson, Pardee Professor of Computer Science, Emeritus, UC Berkeley and author of “Computer Architecture: [...]

5th RISC-V Workshop Proceedings

December 11th, 2016|

Date November 29 - November 30, 2016. Venue Google's Quad Campus Mountain View, California.   Proceedings for the 5th RISC-V Workshop, hosted at Google’s Quad campus in Mountain View, California on [...]